1. Technical Field
The invention is related to the field of modems for use with personal computers or other similar host devices.
2. Background
When a computer, portable computer, or other host device utilizing a modem is turned on or reset, it is strongly desired that the modem quickly complete its own reset and then enter a xe2x80x9csleepxe2x80x9d mode as soon as possible. A sleep mode is a condition wherein the modem, or similar device, is waiting to be utilized by the host to perform its primary tasks. While waiting in a sleep mode the device uses a minimal amount of power.
A quick to reset and sleep operation is desired for a variety of reasons. Primarily, quickly obtaining a sleep mode allows for compliance with the requirements of the standard issued by the Personal Computer Memory Card International Association (PCMCIA). Specifically, the PCMCIA standard requires that the average current during the first second after power is applied to the modem not exceed a specified value. This requirement is made to protect the host from a device which would draw too much power from it. A quick reset and sleep of the modem also provides the advantage of conserving power.
Like other components of a host, the modem""s reset is initiated by the host""s reset pulse. The host""s reset pulse is asserted soon after power has been applied to the host or when a system reset command has been made. For a host""s PCMCIA system, the reset pulse, as well as all other aspects of the system, must comply with the PCMCIA standard.
PCMCIA is an international standards body and trade association consisting of over 300 companies that has developed a standard for small, credit card-sized devices called PC Cards. Initially PC Cards were primarily used to provide additional memory to the host, but now PC Cards are used in many varied applications including several types of RAM memory, pre-programmed ROM cards, modems, sound cards, floppy disk controllers, hard drives, CD ROM and SCSI controllers, Global Positioning System (GPS) cards, data acquisition, pagers and other external devices. Complying with the PCMCIA standard provides many advantages.
Although the PCMCIA standard was originally developed for adding memory to portable computers, as noted, it has been expanded over time to cover many different types of external devices. Modems are one of these types. The PCMCIA standard requires that the average current draw during the first second after start-up of the computer not exceed a specified value. To comply with this requirement, not all of the attached devices can be running during the entire duration of the start-up. Therefore, a goal in designing a PCMCIA compatible device, such as a modem, is to have the device enter a sleep mode as soon as possible after the beginning of the start-up or reset.
Similarly, it is a goal to conserve power as prescribed by the xe2x80x9cBerlin Power Compliancexe2x80x9d. In meeting all the foregoing requirements the modem""s Digital Signal Processor (DSP) needs to complete initialization and cause the modem to enter a sleep mode as soon as possible.
For modems, the problem which has existed to date is that if the modem simply uses the host""s reset pulse to control its own reset, it will not reset and enter its sleep mode quickly enough. This is due to the fact that the modem""s DSP will not begin the sleep operation until after the host reset pulse has finished. Although the DSP will start its initialization when the host""s reset pulse is initially received, and the DSP may possibly even finish initialization prior to completion of the reset pulse, the DSP will only begin causing the modem to enter a sleep mode upon receipt of the trailing edge of a reset pulse. In other words, the time required for the modem to complete its reset and go to sleep has always been longer then the duration of the host""s reset pulse.
For a PCMCIA system, the PCMCIA reset pulse is asserted by the host computer, via the PCMCIA controller, at the time of a start-up or a reset. The PCMCIA reset pulse, which instructs all attached components to perform their own resets, can vary in its duration. Under the PCMCIA standard, the PCMCIA reset pulse must be at least 10 micro-seconds long, but the pulse can potentially last several seconds. In circumstances where the PCMCIA reset pulse is long, the modem will fail to comply with the PCMCIA standard as the modem will take too long to reset and go to sleep.
A further problem with the PCMCIA reset pulse is that as a positive asserted pulse it is incompatible with the need of the internal components of most modems. Specifically, the DSP of most modems require that the reset pulse they receive be a negative asserted pulse. This problem has historically been resolved by simply inverting the PCMCIA pulse prior to it being received by the DSP. Typically, this inversion is performed by the modem""s application specific integrated circuit (ASIC).
It is critical that a proper reset of the modem is carried out. If the reset is never issued at start-up, or if the pulse is so short that it is not recognized by the DSP, then the DSP will start running its code at some random location. Also, if the reset pulse is long enough to be recognized by the DSP, but not long enough to allow the DSP to finish initializing its critical registers, the DSP will fail to operate properly.
With modems, prior solutions to the problems presented by the limited current draw requirements of the PCMCIA standard have primarily involved two approaches. Each of these approaches have attempted to reach compliance with the standard by minimizing the time between the issuance of the host reset pulse and entry into a sleep mode. In the first approach no attempt was made to shorten the PCMCIA reset pulse. Instead, efforts were made to minimize the time needed by the modem to complete its reset and get to sleep after the completion of the PCMCIA pulse. The second approach however did seek to shorten the duration of the PCMCIA pulse by using additional external circuitry to modify the pulse.
The first approach attempted to make the modem comply with the PCMCIA specification by minimizing the time from completion of the PCMCIA pulse to when the modem was asleep. Because no attempt was made to shorten the length of the PCMCIA reset pulse, only the duration of the modem""s initialization and entry into the sleep mode could be shortened. This was accomplished by minimizing the code used by the DSP to perform the initialization and entry into the sleep mode tasks. Further, time was saved by utilizing a faster storage apparatus in the modem. However, under this approach the overall time from start of the reset to entry into the sleep mode could never be shortened sufficiently to assure compliance with the PCMCIA specification. As such, this solution only worked when the PCMCIA reset pulse was relatively short.
The second approach consisted of adding circuitry to provide a greater chance of compliance with the PCMCIA standard. However, this approach was not very efficient, increased costs and used additional board space within the modem. Unlike the first approach, with the second approach the received PCMCIA reset pulse was modified so it had a shorter duration before it was applied to the DSP. The additional circuitry operated to issue a shortened reset pulse to the DSP, allowing a quicker completion of the modem""s reset and entry into the sleep mode. The advantage of modifying the PCMCIA reset pulse was that since the duration of the pulse could be controlled, the reduction of time would not solely be a result of increasing the speed of the modem""s reset/sleep operation. Because the reset pulse seen by the DSP would be substantially shorter than the PCMCIA pulse, the DSP would receive the release (trailing edge) of the pulse long before the PCMCIA reset pulse itself was released. This would allow the DSP to begin the entry into the sleep mode much sooner than if the DSP had to wait for the completion of the PCMCIA reset pulse.
The circuitry used in this approach was placed in line between the host and the rest of the modem""s components. In this position, the circuitry was be able to receive the incoming PCMCIA reset pulse, modify it and send the shortened pulse on to the DSP. Upon release of the shortened reset pulse the DSP would then begin the modem reset and cause the modem to enter a sleep mode much sooner than the prior approach.
An example of the circuitry used in this approach is shown in FIG. 1. As can be seen the circuit is simply a R/C filter, that is, a resistor 2 and a capacitor 4 connected between the PCMCIA reset pulse input 6 and the ground 8. With this circuit, the PCMCIA pulse would first be transformed to a significantly shorter waveform, which would spike upwards and then over time decay as the resistor dissipated the charge stored in the capacitor, as measured at node 3 in FIG. 1 and as charted in FIG. 2. With inversion by an inverter, the circuit""s output pulse waveform would become a signal which drops downward from an initial value, and then steps back up to the initial value, as shown in FIG. 1. The duration of the resulting output waveform would be directly dependent upon the resistance of provided by the resistor 2. The lower the value of the resistance, the quicker the discharge and thus the shorter the duration of the resulting output waveform. The higher the resistance, the slower the discharge and the longer the output waveform.
The shortened and inverted reset pulse would allow the modem to quickly reset and enter a sleep mode regardless of the length of the original PCMCIA reset pulse. In fact, using the external circuitry, the modem could be asleep well before a long PCMCIA reset pulse was complete.
One disadvantage to the use of additional circuitry was that it required extra hardware that raised the cost of the modem and used up valuable board space. Another problem was controlling the duration of the pulse. Because the capacitance and resistance values of the circuit directly affected the shape and length of the waveform, any variations in the values would have a direct effect on the output. The modem""s DSP requires a reset pulse which is at least a certain duration in order to carry out the reset. Therefore, if a particular circuit happens to have a low resistance, causing the output waveform to be too short, the modem will fail to reset.
Because each mass-produced resistor or capacitor varies somewhat from a mean value, the resulting circuits using such elements will have a corresponding range of R/C decay times. To the extent that some of these circuits produce reset pulses which were too short, the modems they were used in would be defective. Of course this defect percentage could be lowered by increasing the mean value of the resistors used. Such an increase would result in an proportional increase in the mean duration of the circuit""s output pulse. Increasing the duration of the output pulse increases the time for the modem to enter a sleep mode. With the duration of reset pulse set too long the modem would not meet the PCMCIA standard.
Thus, a device is sought which will cause the modem to reset itself and enter a sleep mode as quickly as possible after the host has issued a reset pulse. The modem must quickly reset and sleep even if the duration of the host""s reset pulse is relatively long. The device must be relatively inexpensive, use only the modem""s existing hardware and not take up any a additional board space. The device must be capable of receiving the host""s reset pulse and issuing a separate shortened reset pulse to the rest of the modem. But in so doing, the device must not modify or alter the host""s reset pulse. That is, the host and any of the other components attached to the host, must continue to see an unaltered host reset pulse. Further, the waveform or duration of the reset pulse asserted by the device to the rest of the modem must not be susceptible to variations in component values. To minimize the overall time to reset and sleep, the reset pulse asserted by the device must be as close as possible to the minimum required by the DSP.
The present invention is a system and method in a modem for providing a shortened DSP reset pulse upon receipt of an external reset pulse. The system includes a reset controller which operates to cause the modem to complete its reset as soon as possible after an external reset pulse is asserted by the host. The reset controller detects the host""s reset pulse, issues a separate reset pulse to the other components of the modem, monitors the modem""s clock and then terminates the separate reset pulse after a prescribed duration. The length of the waveform of the separate reset pulse is determined by a specific number of DSP clock cycles. This ensures that the minimum time required by the DSP for its reset is met.
In the preferred embodiment, the host is a PCMCIA system which issues a PCMCIA (external) pulse to the modem. The PCMCIA pulse is a positive asserted pulse. Upon detection of the rising edge of the positive asserted PCMCIA reset pulse, the reset controller issues a separate reset pulse to the DSP. The separate reset pulse can be inverted to be a negative asserted pulse by the ASIC or preferably by the reset controller itself. Then, after waiting a specified number of DSP clock cycles, the reset controller ends its pulse by releasing the reset. The advantage is that the minimum xe2x80x9cresetxe2x80x9d time required by the DSP to initialize certain critical registers is a known number of DSP clock cycles. Thus, the reset duration in the invention is precisely minimized to an extent not possible in the prior art.
The use of the DSP clock to obtain a minimum duration reset pulse is a substantial advance over the prior art. In the prior approach of shortening the reset pulse by adding external circuitry the DSP clock was not used to time the pulse because the clock could not be accessed by the added circuitry. As shown in the present invention, the most effective way to obtain the shortest possible modem reset/sleep operation requires the use of the DSP clock for timing and synchronization. That is, by knowing the minimum time needed by the DSP and by having access to the DSP clock, a minimum duration reset pulse can be issued to the DSP. Since the current invention does not use external circuitry, the invention does not have to extend its reset pulse, as was necessary with the prior art to account for variations in components values.
By issuing a separate reset pulse to the DSP, the present invention frees the DSP from being required to wait for completion of the potentially long PCMCIA reset pulse. The DSP can access the ASIC as soon as the DSP initialization is complete. The DSP can then configure the ASIC and place the modem into a sleep mode quickly. This allows the modem to comply with the PCMCIA standard and the requirements of the Berlin Power Compliance.
Although the reset controller can be placed in a variety of locations within the modem, in the present invention the reset controller is included in the ASIC. With the reset controller integrated within the ASIC, no additional external hardware is required to issue the shortened reset pulse.
The invention is embodied in a modem connected to an external controller. The modem includes a DSP having a reset terminal and a clock. The DSP begins performing a reset upon a first signal applied to its reset terminal and causes the modem to enter a sleep-mode after a second signal is applied to its reset terminal. The external controller is capable of transmitting an external signal. The reset controller in the modem has a counter and an output node.
The counter is connected to the clock and provides a counter output signal upon receipt of a predetermined number of cycles of the clock. The counter initiating generally concurrent with receipt of the external signal.
The output node is connected to the reset terminal of the DSP and to the output counter. The output node provides a first signal to the DSP generally concurrent with receipt of the external signal and a second signal generally concurrent with receipt of the counter output signal.
The predetermined number of cycles of the clock should be at least as long as the minimum time the DSP requires to perform a reset. Alternatively, the predetermined number of cycles can be at least the minimum time the DSP requires to perform a reset plus a predetermined margin of error.
The reset performed by the DSP at least involves the initialization of selected registers within the DSP. The reset can also include a confirmation of the reset signal.
Since the counter is connected to the clock, the counter can initialize in synchronization with the DSP clock. That is, the counter can initialize within a clock cycle after the counter first receives the external signal.
Likewise, the output node can be connected to receive the clock signal. By knowing the clock signal the output node can transmit the reset pulse to the DSP in synchronization with the DSP. As such, the output node will provide the first signal of the reset pulse to the DSP within a clock cycle after the output node first receives the external signal.
The modem may be connected to the external controller by way of an external bus which will carry the external reset signal from the bus controller to an application circuit of the modem. The application circuit would be connected directly to the external bus and to a DSP bus. The DSP bus would be positioned between the application circuit and the DSP, such that the DSP could carry signals between the application circuit and the DSP. The external reset signal can be a pulse waveform. The leading edge of the pulse waveform causing the DSP to initialize selected registers and the trailing edge allowing the DSP to begin running code which may, for example, place the modem to sleep.
The method of providing a shortened reset pulse utilizes the system described herein and includes the steps of asserting a reset signal to said DSP reset terminal generally concurrent with receipt of the external reset signal, and deasserting the reset signal upon completion of a predetermined number of clock cycles by said counter, after said asserting step.